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CHIP-8 is not a processor or a standalone console. It is an interpreted programming language and virtual machine originally created by Joseph Weisbecker for the RCA COSMAC VIP hobby computer. The interpreter ran on an RCA 1802-family system and provided a compact way to make games with graphics, sound, timers, input, and subroutines without programming the host processor directly.
That distinction explains both CHIP-8’s appeal and its modern compatibility problems. A basic interpreter is small enough to build as a first emulation project, but historically accurate behavior depends on which CHIP-8 implementation is being reproduced: the original COSMAC VIP environment, CHIP-48, SUPER-CHIP, XO-CHIP, or a modern convention.
CHIP-8 was a software layer, not a CPU
In the late 1970s, programming a hobby computer such as the RCA COSMAC VIP meant working close to the RCA 1802 processor. That was powerful enough for simple games, but not especially welcoming to beginners. CHIP-8 solved the problem by placing a compact interpreter in memory.
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The COSMAC VIP manual describes CHIP-8 as an interpreter that must be loaded into memory before CHIP-8 programs can run. Its interpreter listing is especially important because later opcode tables do not always capture the behavior of the original implementation.
CHIP-8 traded execution speed for simplicity. That was a sensible choice for small games on a constrained hobby computer, and it also made CHIP-8 portable to later compatible systems. It eventually appeared on machines including the ETI-660 and, in modified forms, HP48 calculators. Today it runs through emulators on desktops, browsers, phones, microcontrollers, and FPGA projects.
Those later systems should not automatically be called “the original CHIP-8.” CHIP-48 and SUPER-CHIP added or changed capabilities, while XO-CHIP and modern development tools extend the model further. The CHIP-8 extensions reference is useful precisely because it documents this evolving family rather than pretending there is one complete, universally enforced specification.
The classic virtual machine
A conventional classic CHIP-8 implementation exposes a small amount of state:
| Component | Purpose |
|---|---|
| Memory | Typically a 4 KiB address space in classic references, containing the interpreter, font data, program, and working data. |
| Program counter | Points to the next two-byte virtual instruction. |
I |
An index register used for sprite and data addresses. |
V0–VF |
Sixteen 8-bit general-purpose registers. VF commonly doubles as an arithmetic or drawing flag. |
| Stack | Stores return addresses for subroutine calls. |
| Delay timer | Counts down toward zero, conventionally at 60 Hz. |
| Sound timer | Produces a tone while nonzero. |
| Display | A classic 64×32 monochrome framebuffer. |
| Keypad | A 16-key hexadecimal input device. |
| Font data | Built-in small hexadecimal character sprites. |
These are virtual-machine components visible to an emulator. They do not map one-for-one onto physical registers in the original COSMAC VIP. The interpreter used the host computer’s memory and processor while presenting CHIP-8 programs with a simpler abstract machine.
Classic programs conventionally begin at memory address 0x200, after the interpreter and associated data. This is a common arrangement, not an unchanging rule for every later variant or emulator.
What a CHIP-8 instruction looks like
Most CHIP-8 instructions occupy two bytes and are conventionally written as four hexadecimal digits. The digits are often called nibbles:
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6XNNXselects a register.Yoften selects a second register.NNis an 8-bit immediate value.NNNis a 12-bit address.
Representative opcode families include:
| Opcode | Operation |
|---|---|
00E0 |
Clear the display. |
00EE |
Return from a subroutine. |
1NNN |
Jump to address NNN. |
2NNN |
Call a subroutine at NNN. |
6XNN |
Set VX to NN. |
7XNN |
Add NN to VX. |
ANNN |
Set I to NNN. |
CXNN |
Generate a random byte, then AND it with NN and store the result in VX. |
DXYN |
Draw an N-byte sprite at the coordinates in VX and VY. |
FX07 |
Read the delay timer into VX. |
FX15 |
Set the delay timer from VX. |
FX18 |
Set the sound timer from VX. |
FX1E |
Add VX to I. |
FX55 |
Store a range of registers in memory. |
FX65 |
Load a range of registers from memory. |
This is a selection of opcode families, not a universal promise that every implementation gives each one identical side effects. Even the often-repeated claim that CHIP-8 has “35 instructions” requires a counting convention. Different sources count instruction families, undocumented operations, escape mechanisms, and later extensions differently. The historical interpreter and the target variant matter more than a single headline number.
From two bytes to a rendered pixel
The DXYN instruction shows why CHIP-8 is more than a collection of arithmetic operations. It reads sprite data from memory beginning at address I. Each byte represents one row, and each bit represents one monochrome pixel.
In the classic model, drawing uses XOR semantics. A set sprite bit toggles the corresponding display pixel. If the pixel was already on, it becomes off and a collision is recorded in VF. A game can use that flag for walls, bullets, targets, or player collisions.
As a result, drawing the same sprite twice can erase it. This is compact and useful for animation, but it also makes the exact display rules important. Whether pixels wrap around an edge or are clipped is a compatibility choice that must be associated with a particular interpreter family rather than treated as a universal CHIP-8 law.
The fetch, decode, and execute loop
A modern emulator normally represents the virtual machine with state similar to this:
memory[4096]
V[16] // 8-bit registers
I // index register
pc // program counter
stack[] // return addresses
sp // stack pointer
delay_timer
sound_timer
display[64][32]
keypad[16]Loading a classic ROM usually means copying its bytes into memory beginning at 0x200 and setting pc to 0x200. The core loop then fetches two bytes, combines them into one 16-bit opcode, advances the program counter, and executes the operation:
while running:
opcode = memory[pc] << 8 | memory[pc + 1]
pc += 2
decode opcode
execute opcode
if timer_tick:
if delay_timer > 0:
delay_timer -= 1
if sound_timer > 0:
sound_timer -= 1
draw_if_needed()
handle_input()This is a conceptual schedule, not a mandatory architecture. Instruction execution, timer updates, input events, and rendering should be treated as separate timing concerns. The conventional timer rate is approximately 60 Hz; it should not increase simply because a modern host can execute more virtual instructions per second.
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The original interpreter ran on a real 1802, so “one CHIP-8 instruction” is not equivalent to one 1802 machine cycle. A modern emulator must choose its own instruction throughput while preserving the target variant’s timer and input behavior.
The keypad and the waiting instruction
The original keypad has sixteen hexadecimal keys rather than a fixed QWERTY layout. A desktop emulator therefore needs a host-key mapping to the virtual keys.
The FX0A instruction waits for a key press and stores the key value in a register. Implementing it as a naïve busy loop can stop event processing, rendering, or timers, making a game appear frozen. A better emulator records that the virtual machine is waiting, continues servicing the host window and timers as appropriate, and resumes execution when the selected input event occurs.
The exact waiting behavior can vary between interpreter families, so input handling should be tested rather than inferred from one opcode table. The emulator-usage documentation provides useful context for classic keypad operation.
What the 1802 interpreter is doing underneath
Looking “inside CHIP-8” historically means looking beyond a modern emulator’s switch statement. The original CHIP-8 opcodes were fetched and interpreted by RCA 1802-native routines. Those routines used the host processor, its memory, and the interpreter’s own work areas to implement the virtual operations.
The virtual machine was therefore not completely isolated from the host. The 0NNN escape mechanism can call a native 1802 routine. That matters when distinguishing a CHIP-8 interpreter from a complete COSMAC VIP emulator: an interpreter-only project may run ordinary CHIP-8 games while lacking the native environment needed by software that depends on host-specific routines.
Memory layout is part of this story. The interpreter, font data, stack, registers or working storage, program, and video-related data share the host’s address space. The original VIP manual and interpreter listing remain the primary reference for understanding that arrangement.
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Why CHIP-8 emulators disagree
CHIP-8 has no single modern specification that resolves every historical ambiguity. Differences accumulated between the original COSMAC VIP interpreter, CHIP-48, SUPER-CHIP, later community documents, and modern development environments such as Octo.
Important compatibility questions include:
- Do shift instructions operate on
VX, or copyVYintoVXbefore shifting? - Do
8XY1,8XY2, and8XY3modifyVF? - Does
FX55orFX65incrementI? - Does
FX1EaffectVF? - Does
BNNNuseV0or another register when calculating its target? - Do sprites wrap at screen edges or become clipped?
- How exactly does
FX0Ablock? - Are timers driven by a fixed tick or accidentally tied to instruction speed?
- How are random values generated and constrained?
- How do SUPER-CHIP’s high-resolution and scrolling operations behave?
These are not cosmetic differences. A game can pass on one emulator and fail on another because a register flag, index register, edge pixel, or key-wait state changed differently.
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The Timendus CHIP-8 test suite exists for this reason. It includes diagnostic ROMs for baseline behavior, opcode effects, flags, quirks, keypad input, timers, sound, scrolling, and related CHIP-8, SUPER-CHIP, and XO-CHIP functionality. Its results should be understood as tests against named baselines and reference behaviors, not as proof that every historical implementation was identical.
Building a CHIP-8 emulator
A basic interpreter can be written in a weekend, but broad compatibility is a larger project. A sensible implementation order is:
- Create the virtual state: memory, registers,
I, program counter, stack, timers, framebuffer, and keypad. - Load the font and ROM: place the program at the chosen start address, conventionally
0x200for classic CHIP-8. - Implement control flow: jumps, calls, returns, and conditional skips.
- Implement register and arithmetic operations: preserve 8-bit wrapping rules and handle
VFdeliberately. - Implement memory addressing: especially the transfer instructions and their effect on
I. - Implement drawing: XOR pixels, collision detection, and the chosen edge behavior.
- Add timers: drive delay and sound timers from a separate conventional 60 Hz tick.
- Add keypad input: map sixteen virtual keys and implement
FX0Awithout blocking the host event loop. - Choose a compatibility profile: document whether the target is original VIP CHIP-8, modern CHIP-8, SUPER-CHIP, or XO-CHIP.
- Run tests: use diagnostic ROMs before judging compatibility by whether one game happens to display correctly.
Be careful with the host language. Integer widths, signedness, overflow, array bounds, and bit shifting can introduce behavior that never existed in the intended virtual machine. Keep the emulator’s 8-bit registers and 16-bit opcode assembly explicit.
Interpreter or full COSMAC VIP emulation?
| Approach | Best for | Limitation |
|---|---|---|
| CHIP-8 interpreter | A first emulator and ordinary CHIP-8 games. | May not support native 1802 routines or exact host timing. |
| Variant-aware emulator | Modern ROM collections and compatibility testing. | Requires explicit profiles and quirk handling. |
| Full COSMAC VIP emulator | Historical preservation and original software behavior. | Must also emulate the 1802, memory, I/O, display, and host environment. |
| Modern development environment | Writing games quickly in a browser or tool such as Octo. | Targets modern conventions rather than reproducing the original hardware literally. |
| FPGA or hardware implementation | Exploring the architecture physically. | More difficult debugging and tooling. |
The Cadmium project is an example of tooling that addresses multiple CHIP-8 variants and historical behavior. It illustrates why “CHIP-8 emulator” and “COSMAC VIP emulator” are useful but different descriptions.
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A practical test plan should include more than loading a famous game:
- Start with a simple splash-screen or IBM-logo ROM to verify loading, display output, and basic control flow.
- Run opcode and flag tests, checking register values and
VFrather than only the final picture. - Test timers independently from instruction speed.
- Test keypad mapping and the blocked-key behavior of
FX0A. - Draw sprites at every screen edge and verify the selected clipping or wrapping policy.
- Draw the same sprite twice to verify XOR behavior and collision reporting.
- Inspect memory before and after
FX55andFX65, including the final value ofI. - Run each supported compatibility profile separately.
Passing one ROM demonstrates only that one ROM works under one set of assumptions. A reliable emulator documents its target and tests the side effects that games depend on.
Which CHIP-8 should you target?
- Choose original VIP CHIP-8 if your goal is historical accuracy. Use the original manual and interpreter listing as primary references.
- Choose modern CHIP-8 if you want a manageable first emulator and compatibility with contemporary beginner ROMs. Document your selected quirks.
- Choose SUPER-CHIP if you need high-resolution graphics, scrolling, and its related instruction set.
- Choose XO-CHIP if you intend to run or create games designed for Octo’s extended environment.
- Choose a full COSMAC VIP emulator if you need the RCA 1802, original memory map, native calls, and host behavior rather than just the virtual instruction set.
The most important lesson is that CHIP-8’s small size does not make it historically simple. It is a compact virtual machine layered over a real 1970s computer, and its later life produced several related dialects. Once that distinction is clear, the architecture becomes straightforward: fetch two bytes, decode a virtual operation, update the machine state, draw pixels, service input, and tick the timers. The difficult part is deciding which machine you mean.
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