Luke Wren’s PicoStation 3D is an experimental console-board design built around a Raspberry Pi RP2040 microcontroller and a Lattice iCE40 UP5k FPGA. It explores several ways those chips could share graphics and console tasks, but it is not a documented, working games console: Wren’s project repository describes it as unfinished and untested, with the prototype not yet brought up and no firmware written at the time of publication. The PicoStation3D repository is the primary source for its design and status.
What is PicoStation 3D?
PicoStation 3D is a custom board concept for a 3D games console. Its central idea is to pair the RP2040—a microcontroller—with an iCE40 UP5k FPGA, a programmable logic chip. Rather than committing to one fixed division of labor, Wren outlines several possible architectures for how the two could cooperate.
The design specifies 8MiB of HyperRAM connected to the FPGA, along with microSD storage, a micro USB port for power and RP2040 programming or serial communication, a 3.5mm audio jack, an HDMI connector carrying DVI-D video from the FPGA, and two SNES controller sockets. These are features in the board design, not confirmation that a finished console supports them in practice.
Hackster’s February 4, 2021 report identifies Wren as an engineer who worked on the RP2040 project at Raspberry Pi. Its coverage describes the project as a way to give the RP2040 and FPGA 3D-console roles—or to reverse them.
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Four possible ways to divide the work
Wren’s repository describes four approaches. They are architectural possibilities, not implemented modes or benchmarked performance results.
| Approach | RP2040’s possible role | FPGA’s possible role |
|---|---|---|
| 1. Microcontroller-led graphics | Runs graphics routines and the rest of the console work. | Acts as a parallel-to-DVI-D bridge. |
| 2. FPGA soft processor | Provides a USB-serial bridge and loads firmware. | Hosts a soft processor and handles other console functions. |
| 3. Split console and graphics | Handles game logic, audio, controller access, and SD access. | Runs graphics hardware; its local HyperRAM serves as video memory. |
| 4. Split 3D pipeline | Performs vertex-side 3D operations. | Implements fragment-side 3D hardware. |
The options show why the title can read both ways: the design leaves open whether the RP2040 or FPGA would take on more of the graphics work. The repository presents the board as an exploration of how little hardware might be needed and of how to communicate between the RP2040 and FPGA; it does not establish which option works best.
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How the chips were intended to communicate
The board design has 12 connections between the FPGA and RP2040, including an RP2040 clock output connected to a global clock input on the FPGA. The intended interface is an 8-bit parallel bus with a free-running clock, a valid-ready handshake, and an interrupt-request (IRQ) line.
Those interface connections overlap pins used to load the FPGA’s configuration memory. The design therefore has the RP2040 write the FPGA bitstream from its own flash at boot; it does not include separate external FPGA configuration flash. This describes the planned arrangement, not a verified boot process.
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Project status and revision-A warning
Wren says a first board iteration had been laid out and a prototype soldered, but that it had not been brought up and firmware had not been written at the time described in the repository. That status means there is no basis in the project materials for claims of demonstrated gameplay, tested compatibility, or measured console performance.
The most important practical warning concerns power. Wren says the revision-A power chain violates the UP5k’s sequencing requirements and explicitly advises readers not to copy that schematic. The repository also notes audible digital supply noise in the audio jack and that the controller ports are accessible only from the RP2040.
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- The SNES sockets are transposed left-to-right relative to their positions on a real SNES.
- The board places components on both sides, which makes home reflow more difficult.
- The repository identifies the project source files as CC0-1.0.
These details make PicoStation 3D useful as an architectural experiment to study, but the power warning and untested status matter if approaching it as a build. A wired SNES-style controller is the relevant peripheral category indicated by the design; no specific controller model is identified as tested.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What PicoStation 3D does—and does not—show
PicoStation 3D documents a proposed way to combine a microcontroller, FPGA, and external memory in a compact console board, with several possible allocations of game logic and graphics. It does not document a completed, working console or prove that any of those allocations delivered usable 3D gameplay. Treat the repository as an experimental design reference, and do not copy its revision-A power schematic.
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