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SpinalVoodoo is a modern FPGA reimplementation of the original 3dfx Voodoo Graphics architecture, also known as Voodoo 1 or SST-1. Francisco Ayala Le Brun’s project represents the fixed-function renderer in SpinalHDL-generated RTL rather than translating Glide calls to a modern GPU. It has been demonstrated in simulation and targeted at the Terasic DE10-Nano FPGA board, with tests involving Quake, Screamer 2, and Valley of Ra.
That does not make it a newly manufactured Voodoo card, a drop-in PCI replacement, a software emulator, or a guaranteed way to run every Glide game. It is an evolving hardware-recreation project that shows how the behavior of a notoriously particular 1990s 3D accelerator can be reconstructed in programmable logic.
What has actually been recreated?
The target is the original 3dfx Voodoo Graphics GPU, commonly called Voodoo 1—not Voodoo 2, Banshee, Voodoo3, or Voodoo5. The original board was a dedicated 3D accelerator that normally worked alongside a separate 2D graphics card. Its reputation came from games such as Quake, Tomb Raider, Unreal, and Screamer 2, as well as 3dfx’s Glide API. It was influential, but it was not the first dedicated 3D graphics chipset. Hackaday’s report provides the historical overview.
SpinalVoodoo is best understood as an architectural or behavioral reimplementation. It models the GPU’s registers, rasterization stages, texture processing, blending, depth operations, and memory-facing behavior as digital hardware that runs concurrently inside an FPGA. It is not a reproduction of the original silicon layout or every transistor on the Voodoo die.
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The project also contains software simulation and reference-model infrastructure. That distinction matters: a screenshot produced by Verilator is evidence of the simulated design, while output from a programmed DE10-Nano is evidence of the FPGA implementation. Neither, by itself, proves universal compatibility with original PCs, drivers, or games. The project repository is the authoritative place to check its moving implementation status: SpinalVoodoo on GitHub.
Why reproducing a Voodoo is harder than drawing triangles
The Voodoo was a fixed-function accelerator. It had no modern programmable shaders and no integrated transform-and-lighting pipeline; the host CPU performed substantial setup and 3D-processing work. But “fixed-function” does not mean simple.
A faithful implementation has to coordinate triangle setup and rasterization, Gouraud color interpolation, texture-coordinate interpolation, perspective correction, mipmap and level-of-detail selection, filtering, fog, alpha testing, blending, chroma-key behavior, depth comparisons, dithering, framebuffer access, and PCI/register semantics.
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- Triangle rasterization, span generation, scissoring, and coordinate-origin handling.
- Color, depth, and texture interpolation, including perspective correction.
- Color and alpha combine units, fog, alpha testing, Z-buffer comparison and writes, and alpha blending.
- Chroma key and 2×2 and 4×4 ordered dithering.
- Linear framebuffer reads and writes, fast fills, buffer swaps, and NOP commands.
- Point, bilinear, and trilinear filtering; mipmap calculations; multiple texture formats; and palette/NCC textures.
- Multi-texture/TMU chaining, PCI configuration and FIFO behavior, and DE10-Nano framebuffer scan-out and display timing.
“Implemented” here means that the current repository documents functionality in the design. It does not mean every game, driver path, timing corner case, or physical-board configuration has been validated. The status is revision-dependent, so older reports should not be treated as a definitive feature list.
The register-timing problem is the real technical story
The author describes hundreds of configuration fields—430 in the technical write-up—and four broad kinds of register behavior:
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- FIFO: the value enters the command stream and is consumed in pipeline order.
- FIFO plus pipeline stall: the pipeline must pause or drain before the new state can safely take effect.
- Direct or immediate: the update takes effect through a different, non-FIFO path.
- Floating-point alias conversion: a floating-point-facing register value is converted into fixed-point storage.
These categories are crucial because a renderer may still be processing pixels from an earlier triangle when the host writes a new register. If the update is applied too early, too late, or to the wrong in-flight state, pixels can use settings belonging to another primitive. A register write is therefore not merely a static configuration change; it is part of the timing contract between the host and a deeply pipelined renderer.
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How a subtle pixel bug exposed several deeper mismatches
One debugging example involved translucent text and overlay pixels that rendered incorrectly. The first suspicion was a framebuffer cache or memory-ordering problem. Instead, tracing the affected pixels through the pipeline revealed several smaller accuracy differences:
- The floating-point
Wvalue was quantized too early. - Perspective-coordinate rounding and per-pixel level-of-detail adjustment differed from the reference behavior.
- Blending used expanded destination color rather than the dither-subtracted value expected by the reference path.
Individually, each discrepancy could look insignificant. Together, they produced visible corruption. The author used conetrace, a netlist-aware tracing tool, to follow failing pixels from rasterization through texture mapping, framebuffer access, color combining, and final writeback. The lesson applies well beyond Voodoo preservation: hardware recreation frequently fails through the interaction of small rounding and timing differences rather than one obviously broken block.
The author’s technical write-up at noquiche.fyi explains the architecture and debugging process in greater depth.
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The repository’s simulation gallery includes Screamer 2, Quake, and Valley of Ra. It also provides Glide simulation tests, screenshot comparisons, trace capture, reference-model replay, and DOS workload paths.
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Those demonstrations represent different levels of evidence:
- A screenshot from Verilator demonstrates the simulated RTL path.
- A DOSBox-X workload exercises the project’s software test and Glide-loading infrastructure.
- A workload rendered on a physical DE10-Nano demonstrates the board implementation.
- A complete game running through an original-era operating system, driver stack, and physical FPGA configuration would be a stronger end-to-end compatibility test.
They should not be collapsed into the claim that all Voodoo games work. The repository’s screenshot and pixel-difference tools are valuable precisely because they allow behavior to be checked at a much finer level than a single successful launch.
Performance: useful numbers, limited conclusions
SpinalVoodoo’s repository includes DE10-Nano benchmark comparisons with an original Voodoo 1 for several triangle sizes and rendering modes. The project-provided results range from roughly 20% to more than 150% of the original card’s measured Ktri/s, depending on the workload.
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Can it be used with MiSTer?
The DE10-Nano is the FPGA development platform at the heart of MiSTer, which makes MiSTer relevant. The SpinalVoodoo repository includes a DE10-Nano hardware flow, and the official MiSTer requirements document identifies the same board as the standard platform.
However, running on the DE10-Nano is not identical to being a normal, one-click MiSTer core. RetroRGB reported resource usage of about 70% of the FPGA and noted that combining the design with the AO486 PC core would be impractical on the same device because the PC core also consumes a substantial share of the fabric. Resource use and compatibility can change with revisions, so users should check the current project documentation before assuming that a complete AO486-plus-Voodoo configuration is possible.
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In practical terms, SpinalVoodoo is currently more attractive as a standalone accelerator experiment, simulation target, or foundation for future FPGA hardware than as a finished console-like retro-gaming setup. MiSTer accessories such as SDRAM, USB hardware, cooling, and a case may be useful for a broader DE10-Nano system, but they should not automatically be treated as SpinalVoodoo requirements.
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How to try the project
This is a development workflow, not a plug-and-play installation. Expect to need Linux familiarity, Scala and SpinalHDL tooling, FPGA build tools, a Terasic DE10-Nano, a suitable power supply, network access to the board, and an HDMI display. For game testing, use legally obtained game files and patches.
Build and test
scala-cli test .
scalafmt
scala-cli compile .Run Glide simulation tests
make native/sim/run/test00
make native/sim/run-all
TRACE=1 make native/sim/run/test00Simulation screenshots are written under output/<test>/screenshot.png.
Use the DOSBox-X path
The simulated Glide backend uses a 32-bit libglide2x, so DOSBox-X must also be 32-bit for the relevant dynamic-loading path.
make dos/sim/build
make dos/sim/run/df00sdk
make dos/sim/headless/df00sdkRun trace-based validation
make native/trace/run/test_alphabet
make native/sim/check/test_alphabet
make native/sim/test/test_alphabetThe repository documents reference, simulation, and difference images under test-output/<trace>/. These tests are particularly useful when a workload appears visually close but differs in exact pixels.
Build and deploy to a DE10-Nano
make de10/rtl
make de10/qsys
make de10/bitstream
make de10/setup/program
make de10/setup/deploy
make de10/run/dos/df00sdk
make de10/run/tombHost and deployment settings may need to be overridden with variables such as DE10_HOST, DE10_USER, and DE10_REMOTE_PREFIX. Consult the repository README for the current defaults and board-specific setup.
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Prepare Tomb Raider files
make tomb/prepare ARGS='--game-dir ... --patch ... --iso ...'This command expects game files and 3dfx patch assets supplied by the user. The repository does not turn copyrighted game data into freely distributable project content.
What SpinalVoodoo is not
- It is not a Voodoo 2, Voodoo3, or Voodoo5 recreation. The target is Voodoo Graphics/Voodoo 1.
- It is not a drop-in PCI replacement. The documented design targets a DE10-Nano, not a physical PCI card with vintage-PC bus integration.
- It is not universal Glide compatibility. Demonstrated workloads are not proof that every game or driver behaves correctly.
- It is not guaranteed cycle-accurate hardware. The safer description is an FPGA reimplementation whose behavior is validated against reference results in selected paths.
- It is not a finished commercial product. The FPGA board, build process, software stack, and current implementation status remain part of the project.
- It is not automatically a conventional MiSTer core. Shared board hardware does not guarantee a ready-made integrated PC-and-accelerator experience.
The repository is publicly available, but public availability is not the same as a permissive open-source license. Before redistributing modified RTL, bitstreams, or hardware, inspect the repository’s current license status and the terms of its third-party dependencies.
Is it a practical alternative to an original Voodoo card?
For someone who simply wants to play Voodoo-era games, software emulation remains the easier option: it requires no FPGA board and generally offers a more mature path to running old titles. An original card may appeal to collectors and vintage-PC builders, but aging hardware, scarce parts, drivers, and maintenance are real concerns.
SpinalVoodoo serves a different purpose. Its value is not merely that it can display an old game. It demonstrates that a complex, quirky fixed-function 3D pipeline can be reconstructed in modern RTL, compared against reference output, debugged at the pixel level, and deployed to programmable hardware. That makes it especially interesting for hardware researchers, FPGA developers, preservationists, and technically minded retro-gaming enthusiasts.
The project’s current DE10-Nano flow is a substantial step toward that goal, but it should be approached as experimental engineering rather than as a replacement product waiting to be plugged into a vintage PC.
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